As a method for manufacturing a bonded wafer, there are commonly known an ion implantation delamination method (also called as the Smart Cut method (registered trademark)) and a method in which two wafers are bonded and thereafter one of the wafers is thinned by grinding and polishing.
First, the method using grinding and polishing is performed as follows. Two silicon wafers are bonded directly or through an oxide film without using an adhesive, bonding strength is enhanced by a heat treatment (1000 to 1200° C.), and one of the wafers is thereafter thinned by grinding and polishing. The advantage of this method is that the crystallinity of the thinned silicon and the reliability of the buried oxide film are equal to those of a normal silicon wafer. The disadvantage thereof is that the thinned silicon has film thickness uniformity limitations (at most appropriately ±0.3 μm) and that material costs are high because two silicon wafers are used to manufacture one bonded wafer.
On the other hand, the ion implantation delamination method is performed as follows. After at least one gas ion of a hydrogen ion and a rare gas ion is implanted into a main surface of at least one wafer (a bond wafer) of two silicon wafers to form an ion-implanted layer (a delamination layer) inside the wafer, the ion-implanted surface is brought into close contact with a main surface of the other silicon single crystal wafer (a base wafer) directly or through an oxide film. A heat treatment at 500° C. or more is thereafter performed to delaminate. This method has the advantage that the bonded wafer having a silicon thin film with a film thickness uniformity of ±10 nm or less can be readily manufactured and that material costs can be reduced by reusing the delaminated bond wafer more than once.
Incidentally, in case of bonding through the oxide film, a thick-film SOI wafer having an SOI layer (the silicon thin film) with a film thickness of several to several tens of micrometers is a highly useful wafer for use in bipolar devices and power devices. However, there is known that manufacturing a high quality SOI wafer at low cost is relatively difficult even when the above-described ion-implantation delamination method or the method using grinding and polishing is used.
The reason for that is as follows. In the case of the method of thinning the bond wafer by grinding and polishing, it is necessary to bond a wafer having an oxide film to a bare wafer, to perform a bonding heat treatment at 1100° C. or more, and to perform grinding and polishing processing so as to obtain a desired SOI layer thickness. Processes are thus complicated, and it is extremely difficult to improve the SOI film thickness uniformity. On the other hand, in the case of the ion implantation delamination method, the SOI layer thickness is determined by the depth to which ions can be implanted (that is, accelerating voltage of an ion implanter). When a common implanter is used, the maximum accelerating voltage is approximately 200 keV, and only the SOT layer having at most a thickness of approximately 2 μm is obtained. The thick-film SOI layer having a thickness of more than 2 μm cannot be therefore obtained by this method.
As a method for obtaining the above-described thick-film SOI wafer having a thick SOI layer, there is known a method of making the SOI layer thicker by growing an epitaxial layer on the SOI layer of the SOI wafer obtained by the above-described ion implantation delamination method. However, the surface of the SOI layer, just after delamination, obtained by the ion implantation delamination method has a high degree of roughness (P-V value: nearly 50 nm). When the epitaxial layer is grown on such a surface, the epitaxial layer becomes inferior in a roughness and particle level, and therefore some measures have to be taken against this problem.
In view of this, an attempt to improve the roughness only by polishing makes the film thickness uniformity obtained by the ion implantation delamination method worse. Moreover, Patent Literature 1 discloses that the SOI wafer is subjected to a heat treatment under a reducing atmosphere containing hydrogen or an atmosphere containing a hydrogen chloride gas and the epitaxial growth is thereafter performed.
However, the SOI layer disadvantageously has an unexpected dopant concentration profile depending on the conditions of this heat treatment, and the unexpected profile affects electrical characteristics of devices. In general, the silicon thin films of bonded wafers manufactured by the ion implantation delamination method have the same disadvantage as above.